1. Field
The field of the present invention relates generally to semiconductor devices and processing thereof, and more specifically to a capacitor structure and a process for making the capacitor structure resulting in increased capacitance per unit area.
2. Related Art
As semiconductor device features are reduced to smaller dimensions, issues can arise with regard to capacitance per unit area of capacitor structures. For example, gate oxide layers have been reduced in thickness to the point that gate leakage increases. In order to overcome such leakage problems, thicker oxide layers (e.g., high voltage capacitors) are traditionally used which results in lower capacitance per area and potentially additional processing steps.
It is desirable to use existing processing steps, including masking, to provide improved capacitance density in capacitor structures used as, for example, decoupling capacitors, op-amp compensation capacitors, and the like.
The use of the same reference symbols in different drawings indicates identical items unless otherwise noted. It should be noted that the layers and structures depicted in the figures are not necessarily drawn to scale. In particular, the dimensions of layers and structures may be distorted to emphasize the fabrication of the topographies and, consequently, should not be restricted to the depictions of the drawings.